linuxaudio.org

On Fri, Nov 13, 2009 at 07:56:13PM +0000, Folderol wrote:
> The effect you can get with a system with poor stability but very strong

quoted text
> locking when incoming pulses are half way between the wanted times

> (used to happen a lot with early discrete PLLs). The system will

> alternately lock on the early and late pulses. The correction waveform

> looks like a cog railway :)

- To generate a clock that is good enough for audio sampling you'll

  need a analog PLL based on an Xtal oscillator, and with less than

  1ns (nanosecond) jitter in the audio BW, and preferably even less.
- All AD converters require a clock that is much higher than

  the sample frequency. For example the TI ADS1278 requires

  27 or 37 MHz. 
- If you want the soundcard to lock to a reference provided by

  the master (PC), all you have is the timing of Ethernet

  messages. For example the PC could send a message every

  millisecond. With the above clock frequencies that would

  mean a PLL multiplier with a ratio of 27000:1, somewhat

  more than the 1:1 you seem to assume. It would need a BW

  of a fraction of a second. Can be done, but not simple.
Ciao,
--

FA
Io lo dico sempre: l'Italia è troppo stretta e lunga.
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